Beyond the Limits of Traditional Photolithography in IC manufacturing: Design and Application of Special Alternating Phase Shift Mask

Prof. (Dr.) Arijit Roy
Department of Electronics, 
West Bengal State University, Barasat, Kolkata 700 126.

Abstract - 
                    Speed enhancement and down scaling remain the most challenging areas in IC manufacturing for mass production. The speed enhancement is in progress by reducing the so called ‘RC delay’. In fact, at present there two processes are in parallel progress: one is by reducing the capacitance C using ultra-low-k dielectric replacing the SiO2 matrix and the other one is by reducing the resistance R using Cu interconnects replacing the Al-based interconnects.
On the other hand, due to the aggressive scaling, the minimum feature size requirement goes below the limit of traditional lithography systems. For example, recent demands of patterning feature size below 0.25 µm is challenging using DUV-248nm photolithography system which is extensively used for mass production of ICs. The diffraction phenomenon of light comes into play and limits the resolution of photolithography when the feature size on the mask is comparable to the wavelength of light source used in lithography tool.
At this time, many techniques have been investigated to pattern narrow (down to about 150 nm of line width) chip-level Cu interconnects, namely: (a) spacer technique, (b) double exposure technique (c) off-axis illumination technique, (d) use of 193 nm optical source in lithography etc. All these alternative techniques having their own disadvantages like: double exposure technique is not suitable for mass production due to its cost; off-axis illumination technique is unable to pattern isolated or semi-isolated lines on the wafer. Changing the optical source to lower wavelength such as to 193nm, is not the first choice since, set of materials involved in traditional lithography are required to change. Therefore, patterning Cu interconnects of line width down to 150 nm using traditional lithography system remains a challenging manufacturing issue. State of the art research and development facilities for semiconductor process technologies are essential to resolve the issue.  
The light diffraction phenomenon problem in photolithography is converted into advantage by using Phase Shift Mask (PSM). There are many types of phase shift masks such as binary PSM (B-PSM), attenuated PSM (Atn-PSM), alternating PSM (Alt-PSM) etc. Among these, Alt-PSM is more attractive because it delivers enhanced lithographic performance parameters. Also, it is noticed that assist features like scatter bars in the Alt-PSM improves the lithographic resolution further when properly designed. 
Making optimal Alt-PSM is not an easy job. Extensive simulation study is required to obtain the optimistic Alt-PSM design parameters. The simulation study is conducted using PROLITH 3D simulator and scatter bars are also considered in the simulation for mask design. Chip-level Cu interconnects of line width ranging from 100 nm to 2000 nm (in steps of 50 nm increment) is considered in the simulation. In this way, Alt-PSM design parameters are extracted which are used to fabricate the mask.
The mask is then used to fabricate Cu interconnects using damascene process technologies. The critical process steps are investigated and extensive characterizations are performed to establish a well control manufacturing process. The electrical characterization and reliability performance of the fabricated Cu interconnects are performed and compared with the same fabricated by conventional methods; and promising results are obtained for Cu interconnects fabricated using the specially designed Alt-PSM.